Dimensional Expressivity Analysis of Parametric Quantum Circuits

Parametric quantum circuits play a crucial role in the performance of many variational algorithms. To successfully implement such algorithms, one must design efficient that sufficiently approximate solution space while maintaining low parameter count and circuit depth. In this paper, develop method to analyze dimensional expressivity parametric circuits. Our technique allows for identifying superfluous parameters layout obtaining maximally expressive ansatz with minimum number parameters. Using hybrid quantum-classical approach, we show how efficiently analysis using hardware, provide proof principle demonstration procedure on IBM's hardware. We also discuss effect symmetries demonstrate incorporate or remove from parametrized ansatz.